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march 2013 docid17427 rev 2 1/36 AN3212 application note 5 w to 7 w high power factor offline led driver based on viper devices introduction the driving idea behind this application note is to exploi t the possibility of implementing an led power supply module characterized by a hi gh power factor, based on devices from the viper family in flyback confi guration and with a tsm1052 as a constant current controller. the other key point is to avoid using high vo ltage electrolytic capacitors, evaluate the influence of the output bulk electrolytic capa citor on overall performance, and consider its replacement with much smaller ceramic components, eventually implementing a non electrolytic configuration. the steval-isa120v1 demonstration board has been designed as a platform to perform this evaluation. figure 1. steval-isa120v1 viper27 led driver module www.st.com
contents AN3212 2/36 docid17427 rev 2 contents 1 main characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 initial configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 primary side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 secondary side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 circuit variants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3 startup sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.4 short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.5 open circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4 measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 7.0 w no el_cap configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.2 7.0 w el_cap configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.3 emi filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.4 thermal maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5 electrical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6 bom list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 7 7 w transformer specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7.1 mechanical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7.2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 docid17427 rev 2 3/36 AN3212 list of figures list of figures figure 1. steval-isa120v1 viper2 7 led driver module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. initial configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 3. primary side schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 4. id lim vs r lim - viper17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 5. id lim vs r lim - viper27 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 6. no feedback on fb pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 7. feedback on fb pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 8. feedback voltage v_fb vs. vac and vout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 9. secondary side equivalent schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 10. v_drain, i_drain at vin= 75 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 11. v_drain, i_drain at vin= 100 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 12. v_drain, i_drain at vin= 120 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 13. v_drain, i_drain at vin= 162 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 14. v_drain, i_drain at vin= 254 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 15. v_drain, i_drain at vin= 325 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 16. v_drain, i_drain at vin= 391 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 17. v_drain, i_drain at vin= 50 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 18. vin and iin at vin = 230 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 19. vin and iin at vin = 115 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 20. v_out, i_out at vin = 230 vac, no el_cap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 21. v_out, i_out at vin = 115 vac, no el_cap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 22. v_out, i_out at vin = 230 vac, 1000 f el_cap. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 23. v_out, i_out at vin = 115 vac, 1000 f el_cap. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 24. startup sequence at vin = 230 vac, no el_cap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 25. startup sequence at vin = 115 vac, no el_cap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 26. startup sequence at vin = 230 vac, 1000 f el_cap . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 27. startup sequence at vin = 115 vac, 1000 f el_cap . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 28. short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 29. short circuit application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 30. short circuit removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 31. open circuit protection vin = 277 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 32. open circuit protection vin = 90 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 33. open circuit application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 34. open circuit removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 35. test setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 36. no_el_cap output voltage (avera ge). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 figure 37. no_el_cap output current (average) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 figure 38. no_el_cap output current (peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 39. no_el_cap output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 40. no_el_cap efficiency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 41. no_el_cap power factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 42. 1000 f output voltage (average). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 43. 1000 f output current (average ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 44. 1000 f output current (peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 45. 1000 f output power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 46. 1000 f efficiency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 47. 1000 f power factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 48. emi (pi filter) 230 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 list of figures AN3212 4/36 docid17427 rev 2 figure 49. emi (pi filter) 115 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 50. emi (l + pi filter) 230 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 51. emi (l + pi filter) 115 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 52. thermal map at 90 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 53. thermal map at 115 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 54. thermal map at 230 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 55. thermal map at 277 vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 56. electrical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 57. coil former mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 58. transformer assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 59. transformer electrical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 docid17427 rev 2 5/36 AN3212 main characteristics 1 main characteristics 1.1 initial configuration several demonstration boards already exist which accept the mains input voltage, wide or local voltage range, and generate a regulated output current to drive an led ?string? with an output power in the range of 3 w to 7 w, but none are expressly intended to achieve a high power factor and/or avoid the use of electrolytic capacitors. for this reason a ?standard? flyback configurat ion was developed, based on a viper device and with a tsm1052 as the constant current controller, then, some changes were introduced in order to address the key points indicated above. figure 2. initial configuration 1.2 requirements the design was started taking the following key points into account: ? input voltage: 100 to 264 v ac ? power factor: > 0.9 @ 115 v and 230 v ? output power: 3.5 w to 7 w (3 x 1 w / 3x 2.5 w led series) ? output current (average): 0.35 a to 0.7 a ? input/output isolation ? no high voltage electrolytic capacitors ? possibility of no low voltage electrolytic capacitors ? open/short-circuit protection ? minimal part count ? no dimming required ! - v ! # ? i n ! # ? i n 2 s e n s e $ # ? 0 $ # ? . 6 ) 0 e r 0 r i m a r y - o d u l e 4 3 - 3 e c o n d a r y - o d u l e circuit description AN3212 6/36 docid17427 rev 2 2 circuit description 2.1 primary side in order to keep the part count to a minimum, the primary side of the converter is based on a device from the viper family, a viper17 for the 3.5 w and a viper27 for the 7 w version. as can be seen in figure 3 , the circuit is similar to a standard flyback, with: ? input section with x2 capacitor, diode bridge, emi filter ? rcd snubber in parallel to the primary winding of the transformer ? auxiliary power supply ? optocoupler insulated feedback loop ? viper converter figure 3. primary side schematic the more ?unusual? points are: ? the relatively small values of the emi filter capacitors ? the circuitry related to the viper ?cont? pin the first is dictated from the high power factor requirement; usually these capacitors have a much higher value in order to get a low output ripple and reduced emi emissions, but this inevitably leads to a poor power factor. for this reason their value must be set as a compromise starting with usual values and reducing them until the required pf can be reached. ! - v ! # ? i n ! # ? i n # # # , 2 # $ 4 ? 4 ? $ # ? 2 ? 2 2 # 1 2 # 5 5 " c o n t f b 6 c c 6 ) 0 e r ? x ! u x i l i a r y 0 o w e r 6 i n ) n p u t 3 e c t i o n 3 n u b b e r 2 , docid17427 rev 2 7/36 AN3212 circuit description care should be taken in designing the emi filter due to the constraints indicated above. in section 4: measurements two versions are presented, with their different responses. the main drawback to this configuration is th at it lacks a bulk capacitor which stores energy on the primary side, and then the output current is affected by a high ripple, unless a large electrolytic capacitor is used on the secondary side. the second point is the true way to get a good power factor. referring to the viper17/27; off-line high voltage converters datasheets, the cont pin is the control that allows reducing the mos peak current setting from the inte rnally fixed point to about 1/10 of that value. this can be accomp lished by means of a resistor rlim connected between this pin and ground. figure 4 and 5 represent the current ratio idlim/(idlim @ 100k) as a function of rlim. as can be seen, ch anging rlim from 100 kohm to a few kohms progressively limits the corresponding mosfet peak current. an equivalent function can be implemented co nnecting the cont pin to a variable voltage through a fixed resistor; in this way the peak current can be modulated simply varying the control voltage: reducing the voltage, lowers the current. then, if the rectified mains voltage is scaled and applied to the cont input, the resulting mosfet peak current, and also the correspondi ng average input current, are shaped just like vin, obtaining the required high power factor. the resistor array made up of r2, r6 and r13 implements this function, where r13 is the lower practical value that fixes the minimum peak current, and r2 + r6 come out as a consequence to guarantee a sufficient power tran sfer to the output (the lower the value, the higher the output power). on the other hand, to maintain a constant (ave rage) output current, some kind of regulation is required and for this reason, on the second ary side, there is an error amplifier which senses the led current and drives an optocoupler (see section 2.2 ). on the primary section the corresponding phototransistor is connected to the ?fb? pin, and through this input the voltage of the viper's pwm comparator is modulated. in this way, the mosfet peak current envelope follows the shape of vin until it is somehow limited by the clipping action of the feedback. it is worth noting that the band width of this loop must be very low, otherwise it would counteract the vin modulation. figure 4. id lim vs r lim - viper17 figure 5. id lim vs r lim - viper27 circuit description AN3212 8/36 docid17427 rev 2 figure 6 and 7 show the results of a simulation which represent the behavior of the circuit. figure 6 is in the case of no feedback on the fb pin: only vin is applied to the cont pin. the average output current is 1.12a. figure 7 represents the condition when also the f eedback is forced on the fb pin (iout_avg = 0.7a). please note that it is a rough appr oximation to show how the configuration works. one limit of this solution is th at the voltage applied to the cont pin is directly proportional to the ac input voltage, and then at higher vin the ?clipping? is more evident and the pf is worse. to overcome this, a possible solution may be to fe ed part of the fb voltage to the cont pin; in this way an offset voltage that is higher at lower ac input is provided, obtaining a more constant modulation shape, and a better pf. figure 8. feedback voltage v_fb vs. v ac and vout unfortunately it is not possible to simply connec t a resistor between the fb and cont pins: to adapt the impedance levels it is necessary to buffer the feedback signal before driving the cont input. to do this, the npn transistor q1 is employed in an emitter follower configuration and the r10 resistor provides the correct balancing between the vin and v_fb actions. figure 6. no feedback on fb pin figure 7. feedback on fb pin ! - v x? ? ?x? ? ? ? e ? ? ?? ?e ? ?? 9 b i e 9 9 d f 9 u p v x? s ?x s x? s ?x s 9 r x w docid17427 rev 2 9/36 AN3212 circuit description reducing its value increases the influence of v_fb, obtaining a better control of the output current even at the extreme mains and load valu es; on the other hand, increasing it makes predominant the influence of vin optimizing the power factor. 2.2 secondary side on the secondary side a tsm1052 is employed as a voltage reference and error amplifier for the constant current control loop, while the cv operational amplifier is simply used as a comparator for output overvoltage protection. the configuration is quite common, with the two op amp outputs tied in wired_or to drive the optocoupler's photodiode. the equivalent circuit is represented in figure 9 . figure 9. secondary side equivalent schematic the first point which is worth noting is the de coupling of the supply vo ltage (r3, d5, c5, c7, etc.) it protects the tms1052 in the case of overvoltage due to led ?open? fault, and filters the noise that may eventually be picked up from the output wire connection. moreover, it avoids that the output voltage and its ripple modulate the photodiode current (while this action can be useful in cv applicat ions, in this case it isn't, because it would introduce a voltage feedback in the current loop path). the second point is related to the tsm1052 gr ounding; in this configuration the reference gnd is on the left-hand side of the sense resistor (r16, r17, r18 in parallel), the tsm1052 gnd pin and the lower side of r14 are connected to this point. ! - v 2 ? 2 ? 2 2 2 # # 2 2 6 6 r e f 6 o u t 6 o u t ? ' . $ 4 ? $ x u & m 6 2 # 5 ! 2 2 # 6 $ # $ 2 # circuit description AN3212 10/36 docid17427 rev 2 looking at the component va lues, it can be noted that: ? the time constant of the voltage op_amp is quite short (r9 = 0 , c10 = 560 pf); this is because the circuit has to react as fast as possible to output overvoltage ? the time constant of the current op_amp is very long (r12 = 5.6 k , c20 = 1 f), as already stated, the reason fo r this is in the way in wh ich the current control is implemented; while vin modulates the cont pin cycle by cycle, the current feedback op_amp simply evaluates the average output current and drives the fb (and cont) pins with a voltage that varies very slowly. for t he same reason, also the capacitor c21, on primary side, has a very high value of 10 f ? the resistor on the optocoupler's photodiode anode (r4) is a mere 220 , this is in order to achieve a high dc loop gain, and so a good current regulation ? the voltage divider, made up of r5 and r1 4, is dimensioned in order to fix an overvoltage cut-off of: equation 1 slightly higher than the maximum output voltage: equation 2 but not too high, so as to avoi d the possibility that vaux too could reach a critical voltage. ? the sense resistor is implemented with r1 6, r17 and r18 in parallel. due to the configuration with gnd on the ?transformer side? of rsense, its value must be evaluated taking into account that the threshold level is 172 mv instead of 200 mv. equation 3 equation 4 equation 5 equation 6 vout coff 1.21v () r5 r14 + r14 ------------------------- ?? ?? 15.97v = ? = vout max vled avg 1 2 -- - vled rip vrsense pk ++ ?? ?? = vsense ' vsense vref vref vsense + --------------------------------------- - ?? ?? ? = vsense ' 0.2 1.21 1.41 ----------- ?? ?? v 0.2 0.858 () v0.1716v = ? = ? = rsense vsense ' i led ---------------------- = rsense 0.1716 0.7 ----------------- - 0.245 = = docid17427 rev 2 11/36 AN3212 circuit description 2.3 circuit variants up to now the ?basic? 7 w configuration has been referenced, but as indicated in the introduction to the document, the goal was also to investigate the influence of the requirements on the design, with special attention to: ? output power: 3.5 w/7.0 w ? input voltage: wide range (90 v - 277 v ac ) / european range (170 v to 277 v ac ) ? power factor: > 0.7/>0.9 ? electrolytic capacitors: yes/no (ripple current) output power: to change this, it is enough to change the value of some components: even though, to obtain the best performance also at 3.5 w, some kind of fine tuning may be required in the current shaping circuitry and in the emi filter section, and probably a smaller transformer would be sufficient. input voltage range: this impacts the voltage ra ting of the devices dire ctly connected to the rectified input voltage. the demonstration boar d is provided with the indicated components to sustain the max value of vin = 277 v, and, of course, in the case of a 90 v - 130 v range they can be derated. on the other hand, the max input current occurs at the lower input voltage and then the transformer must be dimens ioned as a consequence; for this reason, if the board is targeted to the high line range, the transformer may be reduced (to be carefully verified). that is to say that the wide range is the worst condition, and the demonstration board design reflects this fact. power factor: if it is sufficient to reach a pf > 0.7, the transistor q1, and the associated r8, r10, and c13, can be avoided. in any case, if this paramete r must be optimized, r2+r6, r13, and r10 must be modified, even though it's not a straightforward task, because the best shape of the peak current envelope must be found, as a function of input and output voltage ranges. electrolytic capacitors: the question is slight ly more complicated; as leds have a very long life, also the electronics should have a compar able mtbf, but el_caps with this property, despite being very expensive, are difficult to fi nd, for this reason they should be avoided, but without them, in this configuration, the out put current ripple is inevitably high. therefore, special care must be taken in selecting the leds : their max. allowed current must be higher than the output peak current. moreover, this ripple is almost equivalent to a sort of dimming at twice the line frequency which should be ca refully considered from the optical point of view. in any case the board allows all these variations in order to carry out the tests without any major changes. table 1. changes components/power 3.5 w 7.0 w rsense 0.5 0.25 transformer primary inductance 2 mh 1.5 mh viper viper17 viper27 waveforms AN3212 12/36 docid17427 rev 2 3 waveforms to take a look at the behavior of the board, the 7 w configuration has been selected and analyzed in the main characteristic cond itions, capturing th e relevant signals. 3.1 input with the first series of waveforms the intenti on was to give a representation of the viper's drain voltage and current at nominal output (10.5 v/0.7 a) with several input voltages. because of the difficulty of taking a stable snapshot of these measurements with an ac input, use of a dc source was chosen, and the voltage fixed at: 75 v (the minimum level at which the circuit starts switching), 100 v, 120 v, 162 v, 254 v, 325 v, 391 v, and then 50 v (the minimum level at which the converter stops switching. figure 10. v_drain, i_drain at vin= 75 v f igure 11. v_drain, i_drain at vin= 100 v ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= idrain ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= idrain figure 12. v_drain, i_drain at vin= 120 v f igure 13. v_drain, i_drain at vin= 162 v ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= idrain ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= idrain docid17427 rev 2 13/36 AN3212 waveforms figure 14. v_drain, i_drain at vin= 254 v f igure 15. v_drain, i_drain at vin= 325 v ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= idrain ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= idrain figure 16. v_drain, i_drain at vin= 391 v figure 17. v_drain, i_drain at vin= 50 v ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= idrain ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= idrain waveforms AN3212 14/36 docid17427 rev 2 and to give an idea of the ac input voltage and current, figure 18 and 19 show the plot of these waveforms. 3.2 output the following images represent the output current and voltage waveforms at nominal load (10.5 v, 0.7 a) in the case of input voltage of 230 and 115 v ac . without an output electrolytic capacitor: figure 18. vin and iin at vin = 230 v ac figure 19. vin and iin at vin = 115 v ac ch1(brown)= iin ch4 (green)= vin ch1(brown)= iin ch4 (green)= vin figure 20. v_out, i_out at vin = 230 v ac , no el_cap figure 21. v_out, i_out at vin = 115 v ac , no el_cap ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= iout ch1 (brown)=vdrain, ch3 (red)= vout, ch4 (green)= iout docid17427 rev 2 15/36 AN3212 waveforms with an output electrolytic capacitor of 1000 f: of course in the case of no el_cap, the ripple current is much higher, it is up to the application to decide if it can be tolerated or a capacitor is required. 3.3 startup sequence oscilloscope screenshots were taken at 230 v and 115 v, wi th the nominal load without and with - a 1000 f output capacitor. figure 22. v_out, i_out at vin = 230 v ac , 1000 f el_cap figure 23. v_out, i_out at vin = 115 v ac , 1000 f el_cap ch1 (brown)=vdrain, ch3 (red)=vout ch4 (green)= iout ch1 (brown)=vdrain, ch3 (red)=vout ch4 (green)= iout figure 24. startup sequence at vin = 230 v ac , no el_cap figure 25. startup sequence at vin = 115 v ac , no el_cap ch1 (brown)=iout ch2 (red)=vout ch3 (blue)= vfb ch4 (green)=vdd ch1 (brown)=iout ch2 (red)=vout ch3 (blue)= vfb ch4 (green)=vdd waveforms AN3212 16/36 docid17427 rev 2 the circuit is relatively under damped, but this is intentional in order to guarantee a sure startup, while minimizing the short-circuit detection time and providing a good average current regulation. increasing r12 leads to a better startup current envelope and lower overshoot, but care should be taken regarding the overload protecti on and dc current regulation, which slightly worsens. with output capacitors of very high value, it is possible that the circuit doesn?t start at the ?first shot?, in this case it is enough to increase the vaux capacitors c16 and c17, but also in this case the short-circuit protecti on must be evaluated very carefully. 3.4 short-circuit protection the primary application of this board is as a ?bulb replacement?, and therefore short-circuit failure is not critical: provid ed that the circuit survives without any damage. there are no stringent requirements on maximum output current during shorts, so simplicity and minimal part count are privileged at the expense of higher current pulses. as the feedback circuit is too slow to react to the short-circuit, the protection is based on the fact that, in case of overload, the output voltage drops, and as a consequence, also the auxiliary power vdd reaches the shutdown voltage of the controller (8 v nom). the time required for the intervention is direct ly proportional to the capacitance of c16 and c17, and then, the lower their value, the shor ter the output current pulses. but, on the other hand, it cannot be reduced too much, otherwise the startup sequence becomes critical. figure 26. startup sequence at vin = 230 v ac , 1000 f el_cap figure 27. startup sequence at vin = 115 v ac , 1000 f el_cap ch1 (brown)=iout ch2 (red)=vout ch3 (blue)= vfb ch4 (green)=vdd ch1 (brown)=iout ch2 (red)=vout ch3 (blue)= vfb ch4 (green)=vdd docid17427 rev 2 17/36 AN3212 waveforms figure 28. short-circuit protection as the most severe condition appears at the highest input voltage, the snapshot is taken with v ac = 277 v, and with a total capacitance value (c16 + c17) of 44 f. as can be seen, even though the current pulses are quite high (6.6 a max) the output voltage and the repetition rate are low, for this reason also the power involved is not critical (181 mw average) and therefore, this condition can be sustained indefinitely. figure 29 and 30 show the conditions when the short-circuit is applied and removed. it is worth noting that the very short and hi gh current pulse, which appears when the short circuit is forced, is due to the discharge of the ceramic output capacitors; even though no electrolytic is present this curr ent can reach a very high value. ch1 (brown)=iout ch2 (blue)=vout ch3 (red)=vfb ch4 (green)=vdd figure 29. short-circuit application figure 30. short-circuit removal ch1 (brown)=iout ch2 (blue)=vout ch3 (red)=vfb ch4 (green)=vdd ch1 (brown)=iout ch2 (blue)=vout ch3 (red)=vfb ch4 (green)=vdd waveforms AN3212 18/36 docid17427 rev 2 3.5 open circuit protection as already indicated, the tsm1052 in the secondary section contains an op amp that senses the output, and in the case of overvolt age, drives the optocoupler photodiode, which in turn forces the viper's fb pin to ground. as a result the viper stops switching, and enters the burst mode if vfb drops below the 0.6 v threshold. if vdd goes under 8 v (v ac higher then 140 v), a restart cycle is initiated. figure 31. open circuit protection vin = 277 v ac otherwise a continuous burst mode is sustained. figure 32. open circuit protection vin = 90 v ac ch2 (blue)=vout ch3 (red)=vfb ch4 (green)=vdd ch2 (blue)=vout ch3 (red)=vfb ch4 (green)=vdd docid17427 rev 2 19/36 AN3212 waveforms figure 33. open circuit application figure 34. open circuit removal ch1 (brown)=vdrain ch3 (red)=vout ch4 (green)=iout ch1 (brown)=vdrain ch3 (red)=vout ch4 (green)=iout measurements AN3212 20/36 docid17427 rev 2 4 measurements for all the board configurations, a common test setup was defined with: ? a hp6812b programmable ac mains voltage source ? a yokogawa wt210 wattmeter to measure input voltage, current, power, and pf ? a string of several diodes to simulate the led load ? a couple of keithley 2000 multimeters to measure output (average) voltage and current, or alternatively, a wt210 wattmeter to measure output power and efficiency ? an agilent e7402a spectrum analyzer plus lisn for emi conducted emission tests the test procedure consisted of connecting th e module output to a string of 10 diodes (stth108) to emulate an led load with a forw ard voltage of approximately 8.75 v, and then taking the measurements while the input voltage was set at several values from 90 to 277 v ac . the procedure was repeated increasing the numb er of diodes (12 and 14 devices) in order to simulate an led load with a vo ltage of about 10.5 v and 12.0 v. the first run was without any electrolytic, and th en the measurements were repeated with a 1000 f capacitor directly connected to the output. in both conditions relevant data were collect ed and the results summarized in the following graphs: the first shows the output voltage as a function of the input ac voltage with the number of load diodes as the parameter, the others represent: ? the output current (average) ? the output current (peak) ? the output power ? the efficiency ? the power factor as a function of the input voltage and with the output voltage approximately corresponding to 10, 12, and 14 diodes load, as the parameter. figure 35. test setup special consideration must be paid to output power and efficiency measurements. docid17427 rev 2 21/36 AN3212 measurements usually, in making these evaluations on standa rd power supplies, it is enough to take the average values, as read out from the voltme ter (v_led) and ammeter (i_led) and simply calculate the output power as their product. this approach is correct whenever these values are constant, but in this application, due to the high ripple present, especially if no electr olytic capacitor is employed, these waveforms cannot be considered dc values at all. therefore a more accurate way to take the measurements, at least from the ac-dc conver ter point of view, is to connect a true wattmeter also to the output. for this reason, as indicated above, the tw o keithley 2000s were replaced with a wt210 then the input/output power measurements we re repeated and the efficiency evaluated. 4.1 7.0 w no el_cap configuration figure 36. no_el_cap output voltage (average) ! - v ? ?x? ? ?x? x? x? ? ?x? ? ? ? ? ? ? ?? ?? ? 2 x w s x w 9 r o w d j h 9 9 d f 9 u p v ]}? ? ]}? e ]}? measurements AN3212 22/36 docid17427 rev 2 figure 37. no_el_cap output current (average) figure 38. no_el_cap output current (peak) ! - v ?? ? ? ?? ?? ? ? e ? ? ? ? ? ? ?? ?? ? 2 x w s x w & |